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HCF4047B
LOW POWER MONOSTABLE/ASTABLE MULTIVIBRATOR
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LOW POWER CONSUMPTION : SPECIAL CMOS OSCILLATOR CONFIGURATION MONOSTABLE (one - shot) OR ASTABLE (free-running) OPERATION TRUE AND COMPLEMENTED BUFFERED OUTPUTS ONLY ONE EXTERNAL R AND C REQUIRED BUFFERED INPUTS QUIESCENT CURRENT SPECIFIED UP TO 20V STANDARDIZED, SYMMETRICAL OUTPUT CHARACTERISTICS 5V, 10V AND 15V PARAMETRIC RATINGS INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B " STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES"
DIP
SOP
ORDER CODES
PACKAGE DIP SOP TUBE HCF4047BEY HCF4047BM1 T&R HCF4047M013TR
DESCRIPTION The HCF4047B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4047B consist of a gatable astable multivibrator with logic techniques incorporated to
permit positive or negative edge-triggered monostable multivibrator action with retriggering and external counting options. Inputs include +TRIGGER -TRIGGER, ASTABLE, ASTABLE, RETRIGGER, and EXTERNAL RESET. Buffered outputs are Q, Q and OSCILLATOR. In all modes of operation, an external capacitor must be connected between C-Timing and RC-Common terminals, and an external resistor must be connected between the R-Timing and RC-Common terminals. For operating modes see functional terminal connections and application notes.
PIN CONNECTION
September 2001
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HCF4047B
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 2 3 4 5 6 8 9 12 13 10,11 7 14 SYMBOL C R RC COMMON NAME AND FUNCTION
External Capacitor External Resistor External Connection to (1) and (2) Complement Astable ASTABLE Pulse ASTABLE True Astable Pulse -TRIGGER Negative Trigger Pulse +TRIGGER Positive Trigger Pulse EXT. RESET External Reset RETRIGRetrigger Mode Pulse GER OSC. OUT Oscillator Output Q Outputs Q, Q VSS Negative Supply Voltage VDD Positive Supply Voltage
BLOCK DIAGRAM
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HCF4047B
FUNCTIONAL TERMINAL CONNECTIONS
TERMINAL CONNECTIONS FUNCTION* to VDD Astable Multivibrator Free Running True Gating Complement Gating Monostable Multivibrator Positive - Edge Trigger Negative - Edge Trigger Retriggerable External Countdown** to VSS Input Pulse to 5 4 8 6 8, 12 OUTPUT PULSE FROM OUTPUT PERIOD OR PULSE WIDTH
4, 5, 6, 14 4, 6, 14 6, 14 4, 14 4, 8, 14 4, 14 14
7, 8, 9, 12 7, 8, 9, 12 5, 7, 8, 9, 12 5, 6, 7, 9, 12 5, 7, 9, 12 5, 6, 7, 9 5, 6, 7, 8, 9, 12
10, 11, 13 10, 11, 13 10, 11, 13 10, 11 10, 11 10, 11 10, 11
tA (10,11) = 4.40RC tA (13) = 2.20RC
tM (10,11) = 2.48RC
* In all cases external capacitor and resistor between pins, 1, 2 and 3 (see logic diagrams). ** Input pulse to Reset of External Counting Chip. External Counting Chip Output to pin 4.
LOGIC DIAGRAM
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HCF4047B
DETAIL FOR FLIP-FLOPS FF1 AND FF3 (a) AND FOR FLIP-FLOPS FF2 AND FF4 (b)
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol VDD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V C
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HCF4047B
DC SPECIFICATIONS
Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 0/5 0/10 0/15 5/0 10/0 15/0 0.5/4.5 1/9 1.5/13.5 4.5/0.5 9/1 13.5/1.5 2.5 4.6 9.5 13.5 0.4 0.5 1.5 VO (V) |IO| VDD (A) (V) 5 10 15 20 5 10 15 5 10 15 5 10 15 5 10 15 5 5 10 15 5 10 15 18 TA = 25C Min. Typ. 0.01 0.01 0.01 0.02 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 -1.36 -0.44 -1.1 -3.0 0.44 1.1 3.0 -3.2 -1 -2.6 -6.8 1 2.6 6.8 10-5 5 0.1 7.5 -1.15 -0.36 -0.9 -2.4 0.36 0.9 2.4 1 3.5 7 11 1.5 3 4 -1.1 -0.36 -0.9 -2.4 0.36 0.9 2.4 1 Max. 1 2 4 20 4.95 9.95 14.95 0.05 0.05 0.05 3.5 7 11 1.5 3 4 Value -40 to 85C Min. Max. 30 60 120 600 4.95 9.95 14.95 0.05 0.05 0.05 -55 to 125C Min. Max. 30 60 120 600 Unit
IL
Quiescent Current
A
VOH
High Level Output Voltage Low Level Output Voltage High Level Input Voltage Low Level Input Voltage Output Drive Current
VOL
VIH
VIL
IOH
IOL
Output Sink Current Input Leakage Current Input Capacitance
0/5 0/5 0/10 0/15 0/5 0/10 0/15 0/18
<1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1 <1
V
V
V
V
mA
mA A pF
II CI
Any Input Any Input
The Noise Margin for both "1" and "0" level is: 1V min. with VDD =5V, 2V min. with VDD=10V, 2.5V min. with VDD=15V
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HCF4047B
DYNAMIC ELECTRICAL CHARACTERISTICS (Tamb = 25C, CL = 50pF, RL = 200K, tr = tf = 20 ns)
Test Condition Symbol Parameter Astable, Astable to Osc. Out Astable, Astable to Q, Q + or - Trigger to Q, Q Retrigger to Q, Q VDD (V) 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 Min. Value (*) Typ. 200 100 80 350 175 125 500 225 150 300 150 100 250 100 70 100 50 40 200 80 50 100 50 30 300 115 75 Unlimited 0.5 0.5 0.1 1 1 0.5 Max. 400 200 160 700 350 250 1000 450 300 600 300 200 500 200 140 200 100 80 400 160 100 200 100 60 600 230 150 Unit
tPLH tPHL Propagation Delay Time
ns
External Reset to Q, Q tTHL tTLH Transition Time Osc. Out Q, Q
ns
tW
Input Pulse Width
+ Trigger - Trigger Reset
ns
Retrigger
tr, tf
Input Rise and Fall Time All Inputs
s
Q or Q Deviation from 50% Duty Factor
(*) Typical temperature coefficient for all VDD value is 0.3 %/C.
%
APPLICATION INFORMATION 1 - CIRCUIT DESCRIPTION Astable operation is enabled by a high level on the ASTABLE input. The period of the square wave at the Q and Q Outputs in this mode of operation is a function of the external components employed. "True" input pulses on the ASTABLE input or "Complement" pulses on the ASTABLE input allow the circuit to be used as a gatable multivibrator. The OSCILLATOR output period will be half of the Q terminal output in the astable mode. However, a 50% duty cycle is not guaranteed at this output. In the monostable
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mode, positive-edge triggering is accomplished by application of a leading-edge pulse to the +TRIGGER input and a low level to the -TRIGGER input. For negative-edge triggering, a trailing-edge pulse is applied to the -TRIGGER and a high level is applied to the +TRIGGER. Input pulses may be of any duration relative to the output pulse. The multivibrator can be retriggered (on the leading edge only) by applying a common pulse to both the RETRIGGER and +TRIGGER inputs. In this mode the output pulse remains high as long as the input pulse period is shorter than the period determined by the RC components. An external countdown option can be implemented by
HCF4047B
coupling "Q" to an external "N" counter and resetting the counter with the trigger pulse. The counter output pulse is fed back to the ASTABLE input and has a duration equal to N times the period of the multivibrator. A high level on the EXTERNAL RESET input assures no output pulse during an "ON" power condition. This input can also be activated to terminate the output pulse at any time. In the monostable mode, a high-level or ASTABLE MODE WAVEFORMS power-on reset pulse, must be applied to the EXTERNAL RESET whenever VDD is applied. 2 - ASTABLE MODE The following analysis presents worst-case variations from unit-to-unit as a function of transfer-voltage (VTR) shift (33% - 67% VDD) for free-running (astable) operation.
VTR t1 = -RC In ---------- VDD + VTR VDD - VTR t2 = -RC In ---------- 2VDD - VTR (VTR)(VDD - VTR) t3 = 2(t1+t2)= -2RC In ---------------------- (VDD + VTR)(2VDD - VTR)
Typ : VTR = 0.5 VDD tA = 4.40 RC Min : VTR = 0.33 VDD tA = 4.62 RC Max : VTR = 0.67 VDD tA = 4.62 RC thus if tA = 4.40 RC is used, the maximum variation will be (+ 5.0%, -0.0%) In addition to variations from unit-to-unit, the astable period may vary as a function of frequency with respect to VDD and temperature. MONOSTABLE WAVEFORMS
3 - MONOSTABLE MODE The following analysis presents worst-case variations from unit-to-unit as a function of transfer-voltage (VTR) shift (33% - 67% VDD) for one-shot (monostable) operation.
VTR t1 = -RC In ------ 2VDD VDD - VTR t2 = -RC In ---------- 2VDD - VTR (VTR)(VDD - VTR) tM = (t1+t2)= -RC In ------------------ (2VDD - VTR)(2VDD)
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HCF4047B
Where tM = monostable mode pulse width. Values for tM are as follows : Typ : VTR = 0.5 VDD tM = 2.48 RC Min : VTR = 0.33 VDD tM = 2.71 RC Max : VTR = 0.67 VDD tM = 2.48 RC Thus if tM = 2.48 RC is used, the maximum variation will be (+ 9.3%, - 0.0%). Note : In the astable mode, the first positive half cycle has a duration of TM ; succeeding durations are tA/2. In addition to variations from unit to unit, the monostable pulse width may vary as a function of frequency with respect to VDD and temperature. 4 - RETRIGGER MODE The HCF4047B can be used in the retrigger mode FIGURE A : Retrigger-mode waveforms to extend the output-pulse duration, or to compare the frequency of an input signal with that of the internal oscillator. In the retrigger mode the input pulse is applied to terminals 8 and 12, and the output is taken from terminal 10 or 11. As shown in fig.A normal monostable action is obtained when one retrigger pulse is applied. Extended pulse duration is obtained when more than one pulse is applied. For two input pulses, tRE = t 1' + t1 + 2t2. For more than two pulses, tRE (Q OUTPUT) terminates at some variable time tD after the termination of the last retrigger pulse. tD is variable because tRE (Q OUTPUT) terminates after the second positive edge of the oscillator output appears at flip-flop 4 (see logic diagram).
5 - EXTERNAL COUNTER OPTION Time tM can be extended by any amount with the use of external counting circuitry. Advantages include digitally controlled pulse duration, small timing capacitors for long time periods, and extremely fast recovery time.
A typical implementation is shown in fig. B. The pulse duration at the output is text = (N - 1) (tA) + (tM + tA/2) Where text = pulse duration of the circuitry, and N is the number of counts used.
FIGURE B : Implementation of external counter option
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HCF4047B
6 - POWER CONSUMPTION In the standby mode (Monostable or Astable), power dissipation will be a function of leakage current in the circuit, as shown in the static electrical characteristics. For dynamic operation, the power needed to charge the external timing capacitor C is given by the following formula : Astable Mode : P = 2CV2f. (Output at Pin 13) P = 4CV2f. (Output at Pin 10 and 11) (2.9CV2) (Duty Cycle) Monostable Mode : P = -------------------- T (Output at Pin 10 and 11) The circuit is designed so that most of the total power is consumed in the external components. In practice, the lower the values of frequency and voltage used, the closer the actual power dissipation will be to the calculated value. Because the power dissipation does not depend on R, a design for minimum power dissipation would be a small value of C. The value of R would depend on the desired period (within the limitations discussed above). 7 - TIMING-COMPONENT LIMITATIONS TEST CIRCUIT The capacitor used in the circuit should be non-polarized and have low leakage (i.e. the parallel resistance of the capacitor should be an order of magnitude greater than the external resistor used). Three is no upper or lower limit for either R or C value to maintain oscillation. However, in consideration of accuracy, C must be much larger than the inherent stray capacitance in the system (unless this capacitance can be measured and taken into account). R must be much larger than the COS/MOS "ON" resistance in series with it, which typically is hundreds of ohms. In addition, with very large values of R, some short-term instability with respect to time may be noted. The recommended values for these components to maintain agreement with previously calculated formulas without trimming should be : C > 100pF, up to any practical value, for astable modes ; C > 1000pF, up to any practical value, for monostable modes. 10K< R < 1M.
CL = 50pF or equivalent (includes jig and probe capacitance) RL = 200K RT = ZOUT of pulse generator (typically 50)
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HCF4047B
Plastic DIP-14 MECHANICAL DATA
mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch
P001A
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HCF4047B
SO-14 MECHANICAL DATA
DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
PO13G
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HCF4047B
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom (c) http://www.st.com
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